IC 7490 - BCD Counter
A Binary-Coded Decimal (BCD) counter is a sequential digital counter designed to count up to ten decimal digits. With each new clock input, it resets. It's named a "decimal (BCD) counter" because it's capable of generating ten distinct output combinations. A decimal counter can tally values like 0000, 0001, 0010, 1000, 1001, 1010, 1011, 1110, 1111, 0000, and 0001. We also have more information on what is BCD counter or decade counter? waiting for you to explore!
When a 4-bit binary counter is employed as a decimal counter, six of the 16 (24) potential outputs are skipped. There are purpose-built integrated circuits (ICs) designed for decimal counting applications that are readily deployable in electronic circuits. One such IC is the 7490, an asynchronous decimal counter.
What is IC 7490?
The IC 7490 is a 4-bit decade counter utilizing ripple-type architecture. This counter incorporates four master/slave flip-flops, cleverly interconnected to establish a divide-by-two section and a divide-by-five section. These sections are equipped with distinct clock inputs to facilitate alterations in the counter's output states upon a transition from high to low clock signals.
IC 7490 Pin Diagram
IC 7490 is a 14-pin DIP (Dual Inline Package) integrated circuit (IC). The pin diagram and pin descriptions for the 7490 are as follows:
Pin Configuration
Pin No. | Pin Name | Description |
1 | CLKB | Clock Input 2 |
2 | R1 | Reset 1 |
3 | R2 | Reset 2 |
4 | NC | Not Connected |
5 | Vcc | Positive Supply Input |
6 | R3 | Reset 3 |
7 | R4 | Reset 4 |
8 | Qc | Output Pin 3 |
9 | Qb | Output Pin 2 |
10 | Gnd | Ground |
11 |
Qd | Output Pin 4 |
12 | Qa | Output Pin 1 |
13 | NC | Not Connected |
14 | CLKA | Clock Input 1 |
IC 7490 Truth Table
Below is the truth table for IC 7490. As illustrated, the counter progresses from 0 to 9, after which it resets and recommences the counting cycle.
IC 7490 Features and Specifications
Note: Comprehensive technical details can be available in the 7490 datasheet provided at the end of this page.
IC 7490 Circuit
IC 7490 Internal Circuit
Displayed here is the internal configuration of IC 7490. It comprises four Master-Slave JK flip-flops with internal interconnections.
The initial flip-flop is self-contained and functions through the CLKA pin, while the remaining three flip-flops are interlinked with the CLKB pin.
Block Diagram of 7490 counter IC
Let's delve into the Block Diagram of IC 7490, which is depicted in the following diagram. This is a pivotal segment of our discussion, so your focused attention is encouraged.
Now, let's commence a concise introduction to IC 7490, commencing with its input connections:
VCC and GND:
The pins labeled VCC and GND are the input terminals for IC 7490, serving the purpose of providing electrical power to the IC. These input connections are fundamental components present in most devices to deliver power. VCC, denoting Voltage Common Collector, is typically referenced as a high voltage concerning the GND (Ground) terminal. It can vary in polarity, either positive or negative, concerning GND (Ground).
Clock Inputs (A and B):
The terminals marked A and B in the aforementioned diagram are known as Clock Inputs. These input terminals facilitate the provision of clock signals to IC 7490. Clock inputs are a common feature in all Counter ICs, serving the same essential purpose.
Set Inputs (S1 and S2):
The input terminals denoted as S1 and S2 are referred to as Set Inputs because they are employed to set or load specific data or states into the IC. In this context, "data" or "state" can be any arbitrary numerical value, such as 0011 (3). If the objective is to initiate counting from 0000 (3), these Set Inputs play a crucial role. They essentially instruct the IC to commence counting from 0000 (3). Notably, IC 7490 normally initiates counting from 0000 (0), and it does not feature preset inputs. Consequently, the Set Inputs (S1 and S2) are typically connected to GND (Ground).
Counter Designing using 7490 IC
In the realm of Counter ICs, several fundamental terms are frequently employed. Therefore, it's essential to familiarize ourselves with this basic terminology when designing counters.
Within Counter ICs, numerous Clock Inputs are determined by the internal configuration of Flip-Flops. If these Flip-Flop Clock Inputs are not synchronized, meaning they aren't all driven or controlled by the same clock signal or pulse, the counter is classified as an Asynchronous Counter. ICs 7490, ICs 7493, and others exemplify Asynchronous Counters.
Conversely, if all Flip-Flop Clock Inputs are governed by a common Clock Signal (Pulse), the counter is labeled a Synchronous Counter. Examples of Synchronous Counters include ICs 74160, ICs 74163, ICs 74168, and ICs 74169.
Clock Signals are characterized by continuous square waveforms oscillating between high and low states.
BCD stands for Binary Coded Decimal. It involves the replacement of decimal numbers with their corresponding binary codes. For instance, the decimal number 10 is substituted with its equivalent binary code, 1010.
"mod" represents the modulus of the counter, and "n" is an integer value. The modulus of the counter denotes the total number of unique states it cycles through in a single counting cycle. For example, a mod-6 counter must traverse six distinct states in one complete counting cycle: 0000 (0), 0001 (1), 0010 (2), 0011 (3), 0100 (4), and 0101 (5), before returning to 0000 (0).
Since all counter circuits comprise Flip-Flops, a common Clock Signal's failure to trigger all Flip-Flop Clock Inputs leads to an output that is halved with each sequential cycle. To clarify the concept of Frequency Division, refer to the following figure. IC 7490 can function as a frequency divider, capable of dividing the input frequency by 2, 5, and 10.
Sequential Circuits initiate counting in a series, either ascending or descending. ICs 7490, as a decade counter, serve as an example of a Sequential Circuit. Its counting sequence follows an upward progression, moving from 0, 1, 2, 3, 4, 5, 6, 7, 8, to 9, hence its designation as an Up Counter.
Frequency Divider using 7490 Decade Counter
Here is a cost-effective frequency division circuit that utilizes the 7490 decade counter for generating various square-wave signals. The setup incorporates a 10MHz crystal oscillator, a hex inverter IC 7404, and seven 7490 decade counter ICs.
The 7490 IC is a 4-bit ripple-type decade counter. It comprises four master/slave flip-flops interconnected internally to establish a divide-by-two section and a divide-by-five section. Each section possesses an independent clock input, causing a change in the output states of the counter during a high-to-low clock transition. Because of internal ripple delays, the output states do not change simultaneously. Consequently, the decoded output signals may exhibit decoding spikes and should not be employed as clocks or strobes.
Frequency Divider Using the 7490 Decade Counter Circuit
In this circuit, the 7490 ICs are configured as divide-by-10 counters. The circuit's power supply is regulated by IC 7805 (IC1), with LED1 indicating the circuit's power status. A 10MHz clock pulse is generated through the crystal oscillator and the accompanying circuit, which includes IC2 (7404). This clock pulse is directed to pin 1 of IC3 (7490), which divides it by 10 to produce a 1MHz clock pulse at output pin 12. The 1MHz clock pulse is further channeled to the input of the subsequent stage, continuing through IC9.
As a result, at each of the seven counter stages, distinct output pulses are obtained, corresponding to 1 MHz, 100 kHz, 10 kHz, 1 kHz, 100Hz, 10Hz, and 1 Hz, respectively. Rotary switch S2 allows for the selection of these output pulses, which are then directed to an output jack. LED2's blinking or flashing rate serves as an indicator of the output frequency. However, it is only feasible to identify the output frequencies of 1 Hz and 10 Hz, as the LED blinks so rapidly above 10 Hz that accurate frequency estimation becomes challenging.
Working of 7490 Decade Counter Circuit
It's a Binary-Coded Decimal (BCD) counter, capable of counting from 0 to 9, encompassing 10 states. This characteristic qualifies it as a mod-10 counter. The IC consists of two discrete counters: a mod-2 counter and a mod-5 counter. When combined, they function as a mod-10 counter. The first counter generates the mod-2 bit, which subsequently serves as a clock signal for the second mod-5 counter. To enable the mod-5 counter, connect the clock to CLKB, and for the mod-2 counter, use CLKA.
7490 Modular Counter:
When the clock is applied to the mod-2 section of the IC, it cycles between 0 and 1. The output, Qa, is then directed to the mod-5 section of the IC. By integrating both counters, the IC effectively counts from 0 to 9 in BCD format.
In addition to the counting functionality, the IC features two reset pins, R0 and R1, as well as two set pins, S0 and S1. Setting the reset pin high or the set pin low results in a reset of the counter to 0000 (0). Conversely, if the reset pin is set low and the set pin is high, the counter is configured to 1001 (9), representing the highest count.
The count can be extended to 99 (mod-100) or 999 (mod-1000) to suit specific requirements. To facilitate this, the highest output of the preceding IC serves as the clock for the subsequent IC. To function as a mod-10 counter, connect the 2nd clock input (pin 1) and QA, grounding all other reset pins. Supply a pulse to pin 1 to initiate the operation. For mod-6 counting, apply a pulse to input 1, ground the reset pins R3 and R4, and connect QA with input 2.
Circuit Based on the Asynchronous Decimal Counter IC7490
The circuit depicted in the diagram is a static 0 to 9 display, utilizing a 9-segment display capable of showing digits from 7 to 0. It finds various applications in daily life and is implemented using two simple ICs, 7490 and 7446. The circuit operates based on the asynchronous decimal counter 7490 (IC2), a 7-segment display (D1), and a 7446 decoder/driver IC (IC7). The static display circuit can also function as a counter by controlling clock pulses instead of signals from switches and segments, displaying the count or the number of events that have occurred.
Operation Using the 9-to-7 Display of Segment 0:
As known, a 7-segment display comprises seven LEDs marked as 'a' through 'g.' By forward-biasing different LEDs in a sequential order, we can display numbers from 0 to 9. In this static numerical display circuit, we use a common anode 7-segment display. Initially, IC 7490 (IC2) functions as a simple counter capable of cyclically counting from 0 to 9. IC7490 counts input pulses and outputs a 4-bit binary number from pins 8 to 12. The chip counts up to the maximum value and then returns to zero. This can be achieved by using the reset pins 2, 3, 6, 7, 10. In this case, each pin is grounded, resetting the number to 0000 after reaching the maximum.
The output of IC 7490 is fed into IC 7446, which is a straightforward decoder/driver IC. For each clock pulse, the BCD output of IC1 advances one position and provides BCD output. This BCD output is decoded by IC7, which drives the 7490 segments accordingly and drives the display to indicate the corresponding light. By cascading two or more ICs to it, the number of digits can be increased.
IC 7490 Applications
IC 7490, the Decade Counter Circuit, is an indispensable component in digital electronics. Its ability to count in decimal digits makes it a versatile tool in various applications, from digital timers to automated control systems. Understanding its pin configuration and operational modes is key to harnessing its full potential.
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