CD4026B Decade Counter & 7-Segment Display Driver IC – DIP-16
The CD4026B is a CMOS decade counter and 7-segment display decoder/driver IC designed for building digital counters, timers, frequency counters and numerical displays.
It combines a 0–9 decade counter and 7-segment decoding circuit in a single 16-pin IC, allowing a compatible 7-segment display to show the current count without requiring a separate BCD-to-7-segment decoder.
Each positive clock pulse advances the displayed count by one, from 0 through 9, before returning to zero.
Technical Specifications
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Part Number: CD4026 / CD4026B
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Logic Family: 4000B CMOS
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Function: Decade Counter + 7-Segment Decoder/Driver
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Counting Range: 0–9
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Counter Type: 5-Stage Johnson Decade Counter
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Recommended Supply Voltage: 3–18V DC
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Absolute Maximum Supply Voltage: 20V
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Typical Maximum Clock Frequency: Up to 6MHz at VDD = 10V
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Clock Input: Schmitt-Triggered
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Clock Trigger: Positive / Rising Edge
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Reset Input: Yes
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Clock Inhibit: Yes
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Display Enable: Yes
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Carry Output: Yes
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7-Segment Outputs: a, b, c, d, e, f, g
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Package: DIP-16
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Number of Pins: 16
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Mounting Type: Through-Hole
Built-In 7-Segment Decoder
The CD4026B automatically converts its internal counter value into the appropriate signals for a 7-segment numeric display.
This eliminates the need for a separate BCD counter and display-decoder IC in simple counter applications.
The seven outputs are:
a – b – c – d – e – f – g
These outputs generate the segments required to display decimal numbers from 0 to 9.
Decade Counter – 0 to 9
Each valid rising edge on the CLOCK input advances the counter by one.
The sequence is:
0 → 1 → 2 → 3 → 4 → 5 → 6 → 7 → 8 → 9 → 0
This makes the CD4026 particularly convenient for digital counting applications.
Carry Output for Multiple Digits
The Carry Out signal completes one cycle for every ten input clock pulses.
This output can be connected to another CD4026 to create multi-digit counters.
For example:
1 × CD4026 = 0–9
2 × CD4026 = 00–99
3 × CD4026 = 000–999
Additional ICs can be cascaded for larger displays.
Display Enable
The Display Enable Input controls whether the decoded 7-segment outputs are active.
When Display Enable is HIGH, the display outputs operate normally.
When Display Enable is LOW, the seven decoded outputs are forced LOW without clearing the internal counter.
This allows the display to be blanked while the counter continues operating.
Reset Function
Applying a HIGH signal to the RESET input clears the counter and returns it to:
0
This function is useful for push-button reset circuits, automatic reset systems and programmable counting applications.
Clock Inhibit
The Clock Inhibit input can be used to stop counting without resetting the current value.
When Clock Inhibit is HIGH, incoming clock pulses do not advance the counter.
When it is LOW, normal counting can resume.
Pin Configuration – DIP-16
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Pin 1: Clock
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Pin 2: Clock Inhibit
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Pin 3: Display Enable Input
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Pin 4: Display Enable Output
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Pin 5: Carry Out
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Pin 6: Segment F
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Pin 7: Segment G
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Pin 8: VSS / Ground
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Pin 9: Segment D
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Pin 10: Segment A
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Pin 11: Segment E
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Pin 12: Segment B
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Pin 13: Segment C
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Pin 14: Ungated C-Segment Output
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Pin 15: Reset
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Pin 16: VDD / Positive Supply
Applications
Ideal for:
- Digital Counters
- 0–9 Counters
- Multi-Digit Counters
- 7-Segment Displays
- Pulse Counters
- Event Counters
- Frequency Counters
- Digital Timers
- Clocks
- Scoreboards
- Production Counters
- Educational Electronics
- Breadboard Projects
- DIY Digital Electronics
Breadboard Friendly
The DIP-16 through-hole package is suitable for standard breadboards, IC sockets and through-hole PCBs, making the CD4026 convenient for educational and prototype projects.
Important Note
The CD4026B is intended for compatible 7-segment LED display circuits. The decoded segment outputs become HIGH to illuminate the selected segments, making the device commonly used with common-cathode 7-segment displays.
Use appropriate current-limiting resistors with LED display segments. Do not connect LED segments without considering the required segment current and the output-drive capability of the IC.
Unused CMOS inputs should never be left floating. Connect unused control inputs to an appropriate defined HIGH or LOW logic level.
For reliable operation, a 0.1µF ceramic decoupling capacitor close to the IC between VDD and VSS is recommended.
Package Includes
1 × CD4026 / CD4026B Decade Counter & 7-Segment Display Driver IC – DIP-16