SN7490 BCD Decade Counter IC – DIP-14
The SN7490 is a 4-bit Binary-Coded Decimal (BCD) decade counter integrated circuit from the 7400-series TTL logic family. It is designed to count from 0 to 9 and automatically return to 0, making it suitable for digital counting and frequency division applications.
The IC features an internal divide-by-2 and divide-by-5 counter section, which can be connected to provide a complete divide-by-10 counter. Its four outputs represent the count in BCD format.
The SN7490 is widely used in digital clocks, frequency counters, electronic timers, counting circuits, and educational electronics projects.
Key Features
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BCD Decade Counter: Counts from 0 to 9 in binary-coded decimal format.
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4-Bit Output: Provides four digital outputs (QA, QB, QC, QD).
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Divide-by-10 Operation: Suitable for decimal counting applications.
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Dual Counter Sections: Internal divide-by-2 and divide-by-5 stages.
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Asynchronous Counting: Ripple counter operation.
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Reset and Preset Inputs: Supports resetting to 0 and presetting to 9.
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TTL Logic: Designed for standard 5V digital circuits.
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DIP-14 Package: Suitable for breadboards and through-hole PCB assembly.
Technical Specifications
| Parameter |
Specification |
| Part Number |
SN7490 |
| IC Type |
BCD Decade Counter |
| Logic Family |
7400 Series TTL |
| Counter Type |
Asynchronous Ripple Counter |
| Counting Range |
0–9 |
| Counting Modulus |
Modulo-10 |
| Number of Output Bits |
4 |
| Output Format |
BCD |
| Internal Counter Sections |
Divide-by-2 and Divide-by-5 |
| Nominal Supply Voltage |
5V DC |
| Operating Voltage |
4.75–5.25V DC |
| Clock Trigger |
HIGH-to-LOW Transition |
| Reset Function |
Asynchronous Reset to 0 |
| Preset Function |
Asynchronous Preset to 9 |
| Package |
DIP-14 |
| Mounting Type |
Through-Hole |
| Operating Temperature |
0°C to +70°C (commercial version) |
Pin Configuration
| Pin |
Function |
Description |
| 1 |
CKB |
Clock Input B |
| 2 |
R0(1) |
Reset-to-0 Input |
| 3 |
R0(2) |
Reset-to-0 Input |
| 4 |
NC |
No Connection |
| 5 |
VCC |
+5V Power Supply |
| 6 |
R9(1) |
Preset-to-9 Input |
| 7 |
R9(2) |
Preset-to-9 Input |
| 8 |
QC |
BCD Output C |
| 9 |
QB |
BCD Output B |
| 10 |
GND |
Ground |
| 11 |
QD |
BCD Output D |
| 12 |
QA |
BCD Output A |
| 13 |
NC |
No Connection |
| 14 |
CKA |
Clock Input A |
BCD Counting Table
| Decimal Count |
QD |
QC |
QB |
QA |
| 0 |
0 |
0 |
0 |
0 |
| 1 |
0 |
0 |
0 |
1 |
| 2 |
0 |
0 |
1 |
0 |
| 3 |
0 |
0 |
1 |
1 |
| 4 |
0 |
1 |
0 |
0 |
| 5 |
0 |
1 |
0 |
1 |
| 6 |
0 |
1 |
1 |
0 |
| 7 |
0 |
1 |
1 |
1 |
| 8 |
1 |
0 |
0 |
0 |
| 9 |
1 |
0 |
0 |
1 |
After reaching 9, the counter returns to 0 on the next clock pulse.
Connection Example
To configure the SN7490 as a decade counter:
- Connect Pin 5 (VCC) to a regulated +5V supply.
- Connect Pin 10 (GND) to ground.
- Apply the clock signal to Pin 14 (CKA).
- Connect Pin 12 (QA) to Pin 1 (CKB).
- Keep the reset and preset inputs LOW during normal counting.
- Read the BCD outputs from QA, QB, QC, and QD.
The counter will count from 0 to 9 and repeat continuously.
Applications
- Digital Counters
- Electronic Clocks and Timers
- Frequency Division Circuits
- Frequency Counters
- Digital Display Systems
- Pulse Counting Applications
- Sequential Logic Circuits
- Educational Electronics Projects
Important Notes
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Power Supply: Requires a regulated 5V DC supply.
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Clock Input: Counting occurs on the falling edge of the clock signal.
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Reset Inputs: Both R0 inputs must be HIGH to reset the counter to 0.
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Preset Inputs: Both R9 inputs must be HIGH to preset the counter to 9, provided the reset-to-0 condition is inactive.
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Decade Configuration: Connect QA to CKB for standard divide-by-10 operation.
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Logic Compatibility: Check voltage and logic-level compatibility when connecting to 3.3V microcontrollers.
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Decoupling: A 100nF capacitor between VCC and GND is recommended.
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Display Connection: A suitable BCD-to-7-segment decoder is required to drive a standard 7-segment display.
Package Includes